ASIC Engineer (DFT) - 6 Month Daily Rate Contract
About the Company
My client is a world leading wireless technology innovator. They have an immediate requirement for a ASICS Engineer with expertise in DFT to join their team.
About the Position
A world leader in the Wireless Devices space is seeking an experienced ASIC Engineer (DFT). Working on a key project you will work with a small, dedicated team. You will be responsible for the implementation of advanced DFT/DFD (design for test/design for debug) techniques for low power, high performance and highly integrated SoCs. The successful candidate will help in the deployment of DFT methodologies that reduce test cost, increase production quality and enhance yield learning.
· Deployment and implementation of advanced DFT/DFD (design for test/design for debug) techniques for low power, high performance and highly integrated SoCs.
· Deployment of DFT methodologies that reduce test cost, increase production quality and enhance yield learning.
· Strong fundamental knowledge of DFT/DFD techniques for complex SOCs.
· Understanding of core-based test methodology and scan isolation.
· Knowledge in fault modelling Stuck-at, Transition, Path Delay, Gate-Exhaustive, IDDQ, and other advanced DFT models.
· Knowledge in JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and at-speed testing.
· Knowledge and hands on experience in MBIST insertion and Memory test validation Experience with industry ATPG tools Synopsys Tetramax, Cadence Encounter Test or Mentor Fastscan ATPG tools.
· Synopsys DFTC scan insertion.
· Experience in Logic Design, VHDL, Verilog RTL, verification, and static timing analysis.
· Working knowledge in one or more of the following; C, C++, TCL or Perl.
· Experience with industry simulation tools such as VCS, Modelsim, or others.
· Direct experience in silicon bring-up, debug, and validation of DFT features on ATE.
· Detail oriented with strong organizational, problem solving and communication skills.
· Experience in design and verification of the above; layout, SPICE simulation, etc.
· Experience with formal verification tools such Verplex, Formality, etc.
· Knowledge and experience of timing closure and industry tools like PrimeTime and PTSI.
· Experience with other industry tools such as Vera, Spyglass, 0-in, Jasper, RedHawk, PrimePower.
· Bachelor's degree in Science, Engineering, or related field.
· 2+ years ASIC design, verification, or related work experience.
Highly attractive daily rate is on offer.
Please contact Charlie Bigger on 01 5927867 or email or simply click the apply button.
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